May 14, 2024

MCU IO port related knowledge

The CPU includes an arithmetic unit and an arithmetic unit. The arithmetic unit mainly includes an arithmetic operation, a logic operation, and a bit operation. The control logic includes a timing and control, an instruction register, a decoder, an address pointer, and a program counter PC.

Outside the CPU are clock circuits, ROM, RAM, timer/counter, parallel IO, serial interface, and interrupt system.

1.IO port related knowledge

These IO ports are actually GPIOs, which are the four 8-bit registers in the special function register SFR in the microcontroller.

IO can be used as an output or input.

When IO is used as an output, it has its own latch function. That is, after writing 1, the output is always 1 (the value on the latch), and the pin may be affected by an external circuit instead of 1.

The MCU 4 group IO port needs to be pulled up when P0 is output; P1/P2/P3 is quasi-bidirectional port.

Some ports can also be used as data or address inputs and outputs. P1 can only be used as a bidirectional port, P0 expands data and address, P2 extension address is 8 bits high, and P3 has a second special function.

Note the difference between the read pin and the read latch: because sometimes the output is set to 1, but it may be clamped to a low level by an external circuit, so when P0=1 is set, you want to set P0=2 again. Read the latch, this is 1+1, otherwise the read pin may become 0+1. The common read latch instruction is: use ANL, ORL, XRL, CLR, SETB bit manipulation instructions When the I/O port is modified bit by bit, the MCU will first read back the value of the port latch, send it to the ALU for corresponding bit modification, and then write back to the port register, and output it to the peripheral circuit through the drive circuit.

When reading the pin, you need to write 1 to the port and T2 to cut off, so that the external real level is read.

The difference between two-way IO port / quasi-bidirectional IO port

The standard two-way IO port has two features:

1. In the output mode, it can output high and low level;

2. In the input mode, if no external circuit is connected, it should exhibit a high impedance state.

For the P1, P2, and P3 ports of the 51 MCU, due to the internal pull-up resistor, it is impossible to have a high-impedance state in the input mode, so it is called a quasi-bidirectional IO port. When the P0 port is operated as the IO port, if the pull-up resistor is not added, the high level cannot be output; and when the pull-up resistor is added, the high-resistance state does not appear when the input is performed, so it is also a quasi-bidirectional IO port.

If the P0 port of the MCU works in the second function state, it is a bidirectional IO port. When the P0 port is operating in the second functional state, both transistors can work. If the upper transistor is turned off, the lower one is turned on, and the low level is output; otherwise, the upper one is turned off, the high level is output and the pull-up resistor is not needed; if both transistors are turned off, As an input, and exhibiting a high impedance state when there is no external circuit. So it is a two-way IO port.

Note: The sink current can pass a larger current than the pull current; the LED is generally used to sink current.

reference:

2. Interrupt

Common terms: internal interrupt, external interrupt, interrupt response, interrupt service routine, interrupt priority, interrupt nesting, interrupt source, interrupt vector.

Interruption: 1 fast CPU and slow external device speed coordination; 2 real-time control; 3 real-time fault detection and processing; 4 real-time intervention computer work.

The three interrupt sources of the MCU: external 0, external 1, timer 0/1/2, serial port.

External interrupts can be set to level trigger or edge trigger.

Four interrupt-related registers: TCON, SCON, IP, IE.

The serial interrupt flag requires software clearing.

If the external interrupt is triggered by level, if the level trigger is not revoked, the interrupt program will be entered again after jumping out of the interrupt program.

Interrupt response is blocked: RETI is being executed or access to IE, IP, the instruction must be executed, and the next instruction can be executed to respond to the interrupt (such as a strong line, level trigger will execute a main program each time).

3. Timers and counters

51 is two registers, 52 is three registers, all 16 bits.

Working mode register TMOD, control register TCON

4. Storage resources

The internal RAM, generally 128B, includes 16B that can be addressed. When using C, the compiler is helping to allocate. RAM is used to store temporary data for runtime.

The internal ROM is generally 4KB, which is used to store the program, that is, the bin file compiled by keil needs to be stored in the MCU.

External memory, through the IO port, can expand the external RAM up to 64KB, the external ROM up to 64KB.

Encoder

Optical Rotary Sensor,Custom Encoder,Optical Encoder 6Mm Shaft,Handwheel Pulse Generator

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